KFLOP - Connector Pinouts

KFLOP Connectors

JR1 - +5V Power (regulated +/- 5%)

Typical current = 0.35Amps with no user I/O connected. More current may be required dependent on the amount of Digital I/O and option boards. +5V @ 2.5A should be more than sufficient under all conditions. The +12V input is not used internally by the board, but is routed to pins on the JP4, JP6, and JP7 connectors for the convenience of the user. +5V power is also routed to the same connectors. 5V power may be applied at whichever connector is more convenient. This connector is rated for 6.5Amps per connection.

This connector is a standard PC-disk drive power connector which makes it easy to drive the board with an inexpensive PC power supply.

Under some conditions USB power may be used to avoid requiring an external +5V power supply connection. USB specifies a maximum of 500ma may be drawn from the USB cable. KFLOP itself consumes 350ma. If external IO draws less than the remaining 150ma USB supplied power may be used. To utilize USB power connect Jumper J3 and do not supply +5V into any of the KFLOP connectors.

power4pin

PowerPhoto

JP2 - JTAG

This connector is only used for advanced debugging using an XDS510 JTAG type in circuit emulator. A small amount of regulated 3.3V (<0.5 Amp) is available on this connector if needed for external use.

JTAG14pin

JP7 - Digital IO

18 LVTTL bi-directional digital I/O, and +5, +12V, 3.3V power supply outputs. 3.3V is generated internally from the applied +5V. +12V is available if +12V is applied by the User to JR1. +12V is not used by KFLOP but routed through KFLOP to various connectors for the convenience of the User. Many Digital I/O bits are pre-defined as encoder, home, or limit inputs (see table below) but if not required for the particular application may be used as general purpose I/O. Digital Outputs may sink/source 10 ma. Digital I/O is LVTTL (3.3V) but are 5V tolerant except for IO44_3V and IO45_3V. None of the IO including the 5V tolerant IO should be driven hard (>10ma) above 3.8V.

Caution! This connector contains 12V signals. Shorts to low voltage pins will cause permanent damage to the board!

JP7

JP7Photo

Pin Name Description
1 VDD33 +3.3 Volts Output
2 VDD33 +3.3 Volts Output
3 VDD12 +12 Volts Output
4 RESET# Power up Reset (low true) output
5 IO44 Gen Purpose LVTTL I/O (3.3V Only)
6 IO45 Gen Purpose LVTTL I/O (3.3V Only)
7 IO0 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 0 Input Phase A
8 IO1 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 0 Input Phase B
9 IO2 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 1 Input Phase A
10 IO3 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 1 Input Phase B
11 IO4 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 2 Input Phase A
12 IO5 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 2 Input Phase B
13 IO6 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 3 Input Phase A
14 IO7 Gen Purpose LVTTL I/O (5V Tolerant) or Encoder 3 Input Phase B
15 IO8 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 0 Home (or Step 0 output)
16 IO9 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 1 Home (or Dir 0 output)
17 IO10 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 2 Home (or Step 1 output)
18 IO11 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 3 Home (or Dir 1 output)
19 IO12 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 0 + Limit (or Step 2 output)
20 IO13 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 0 - Limit (or Dir 2 output)
21 IO14 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 1 + Limit (or Step 3 output)
22 IO15 Gen Purpose LVTTL I/O (5V Tolerant) or Axis 1 - Limit (or Dir 3 output)
23 VDD5 +5 Volts Output
24 VDD5 +5 Volts Output
25 GND Digital Ground
26 GND Digital Ground

Note: Homes and Limits are recommendations only. Any input may be used.

JP4 - Aux Connector #0

Auxiliary connector which supplies power, reset, and 10 digital I/O (LVTTL 3.3V only) which is normally connected to optional expansion daughter boards (ie. SnapAmp 1000). If no expansion module is required, these digital I/O may be used for general purpose use. The first 8 IO (IO16-IO23) contain 150ohm termination resistors (pull downs).

JP4

JP4Photo

Pin Name Description
1 VDD5 +5 Volts Output
2 VDD12 +12 Volts Output
3 VDD33 +3.3 Volts Output
4 RESET# Power up Reset (low true) output
5 IO16 Gen Purpose LVTTL I/O (3.3V Only)
6 IO17 Gen Purpose LVTTL I/O (3.3V Only)
7 IO18 Gen Purpose LVTTL I/O (3.3V Only)
8 GND Digital Ground
9 GND Digital Ground
10 IO19 Gen Purpose LVTTL I/O (3.3V Only)
11 IO20 Gen Purpose LVTTL I/O (3.3V Only)
12 IO21 Gen Purpose LVTTL I/O (3.3V Only)
13 IO22 Gen Purpose LVTTL I/O (3.3V Only)
14 IO23 Gen Purpose LVTTL I/O (3.3V Only)
15 IO24 Gen Purpose LVTTL I/O (3.3V Only)
16 IO25 Gen Purpose LVTTL I/O (3.3V Only)

JP6 - Aux Connector #1

Auxiliary connector which supplies power, reset, and 10 digital I/O (LVTTL 3.3V only) which is normally connected to optional expansion daughter boards (ie. SnapAmp 1000). If no expansion module is required, these digital I/O may be used for general purpose use. The first 8 IO (IO26-IO33) contain 150ohm termination resistors (pull downs).

JP6

JP6Photo

Pin Name Description
1 VDD5 +5 Volts Output
2 VDD12 +12 Volts Output
3 VDD33 +3.3 Volts Output
4 RESET# Power up Reset (low true) output
5 IO26 Gen Purpose LVTTL I/O (3.3V Only) or PWM0 out
6 IO27 Gen Purpose LVTTL I/O (3.3V Only) or PWM1 out
7 IO28 Gen Purpose LVTTL I/O (3.3V Only) or PWM2 out
8 GND Digital Ground
9 GND Digital Ground
10 IO29 Gen Purpose LVTTL I/O (3.3V Only) or PWM3 out
11 IO30 Gen Purpose LVTTL I/O (3.3V Only) or PWM4 out
12 IO31 Gen Purpose LVTTL I/O (3.3V Only) or PWM5 out
13 IO32 Gen Purpose LVTTL I/O (3.3V Only) or PWM6 out
14 IO33 Gen Purpose LVTTL I/O (3.3V Only) or PWM7 out
15 IO34 Gen Purpose LVTTL I/O (3.3V Only)
16 IO35 Gen Purpose LVTTL I/O (3.3V Only)

JP5 - GPIO #1 / LV Differential Connector

Low Voltage Differential RJ45 Connector. This connector is intended for high-speed low-voltage differential communication over a twisted pair cable use. However it may also be used as 8 General Purpose digital I/O (LVTTL 5V Tolerant)

JP5

JP5Photo

Pin Name Description
1 IO36 Gen Purpose LVTTL I/O (5V Tolerant) or (or Step 4 output) or (Encoder 4 Input Phase A)
2 IO37 Gen Purpose LVTTL I/O (5V Tolerant) or (or Dir 4 output) or (Encoder 4 Input Phase B)
3 IO38 Gen Purpose LVTTL I/O (5V Tolerant) or (or Step 5 output) or (Encoder 5 Input Phase A)
4 IO39 Gen Purpose LVTTL I/O (5V Tolerant) or (or Dir 5 output) or (Encoder 5 Input Phase B)
5 IO40 Gen Purpose LVTTL I/O (5V Tolerant) or (or Step 6 output) or (Encoder 6 Input Phase A)
6 IO41 Gen Purpose LVTTL I/O (5V Tolerant) or (or Dir 6 output) or (Encoder 6 Input Phase B)
7 IO42 Gen Purpose LVTTL I/O (5V Tolerant) or (or Step 7 output) or (Encoder 7 Input Phase A)
8 IO43 Gen Purpose LVTTL I/O (5V Tolerant) or (or Dir 7 output) or (Encoder 7 Input Phase B)