See our KMotion + TI Optimizing video.
The Texas Instruments Optimizing Compiler is now easily usable by adding a compiler pragma at the beginning of the file. The optimization level of 0-3 can be specified as a parameter as well as the Thread Space Size if it is desirable to allow overflow of the Thread Space. Functions and Variables can also be linked to a small amount if high-speed Internal DSP RAM.
Highly optimized code can sometimes do things in parallel, in strange order, or even not at all to give unexpected results. Proper C coding with keywords such as “volatile” can inform the compiler that data can be changed by other things or has influence on things outside the current context. This ensures the compiler does things in a way that to still achieve the desired result. TCC67 does things with no optimization in the exact manner coded so avoids these issues. The TI Compiler at optimization level 0 tends to do all the things coded in the order coded also.
Any detected Errors and Warnings will appear in the lower panel of the C Programs Screen. Double clicking on an error should take you directly to the line in the code where the error was detected.
The following must be the first line in the file:
#pragma TI_COMPILER //defaults to optimization level 0 and normal Thread size of 0x10000 (Thread #7 = 0x50000) #pragma TI_COMPILER(3) #pragma TI_COMPILER(3,0x20000)
To put a function in Fast Internal RAM:
#pragma CODE_SECTION(FunctionName, ".IRAM")
To put a variable in Fast Internal RAM:
#pragma DATA_SECTION(VariableName, ".IRAM")
Note: \DSP_KFLOP\LinkTemplate.cmd controls default TI Linker behavior and can be changed to modify Linking behavior